We are seeking a highly skilled and experienced SystemC Modeling Expert to join our team remotely. In this role, you will develop, validate, and optimize SystemC/TLM models for hardware/software co-design and architectural exploration. Youll work closely with architects and design engineers to simulate system-level behavior and ensure design accuracy, performance, and compatibility with overall platform goals.
Key Responsibilities:
Design and implement high-fidelity SystemC and TLM-2.0 models for IP blocks and full system platforms
Perform system-level simulation, profiling, and analysis to evaluate architecture and performance trade-offs
Collaborate with hardware and software teams to ensure seamless integration and co-simulation
Optimize model performance for simulation speed and accuracy
Document models, test plans, and results to support ongoing verification and validation efforts
Contribute to modeling methodologies and tool chain improvements
Qualifications:
Bachelors degree in Electrical Engineering, Computer Engineering, or related field
2+ years of experience in SystemC and TLM modeling for hardware/software co-design
Proficient in C++, SystemC, and modern simulation and verification flows
Familiarity with embedded systems, processor subsystems, and SoC design
Experience with Virtual Platforms, ESL (Electronic System Level) modeling, or architecture simulation tools is a plus
Excellent problem-solving and communication skills
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